The 370 I/O devices are delivered intact to holders of device keys.

Pages and nodes have fixed disk addresses and RAM is merely a cache for the disk. The kernel fetches pages and nodes from the disk as keys for them are used. The kernel writes modified pages and nodes back to disk as channel time allows or congestion requires. Upon writing them back to disk, copies remain in RAM barring congestion.

This records some the interface within the kernel to the disk page subsystem. When a page key is used it must be prepared and when it is prepared it is necessary to locate the page it refers to in RAM. A hash chain is searched where the page will be found if it is in RAM. If it is not the acting domain is put on an I/O queue whose identity is chosen based on the disk address of the page. There are rather more such queues than disk devices and the expected number of members of an IO queue is much less than one.

The physical address of the page is formed from the CDA in the key. A list of pages currently in the process of being brought to RAM to see of this page has already been summoned, for if so it would be a mistake, not merely inefficient, to summon it again, lest we end up with two copies in RAM.

A page frame in RAM is selected. A channel program is adapted to fetch the page and the program is inserted in the channel program that may already be running for the disk. When a channel program finishes an interrupt informs the kernel and the kernel considering which pages have arrived, transfers all of the members of the relevant I/O queues to the CPU queue. A domain that had been blocked by a missing page is most likely to repeat the trap with the difference that the page will now be found on the hash chain.

This is a high level and oversimplified description. Checkpoint logic complicates, but does not drastically change this view.