There is an additional C sort of packet.
C packets travel along a ‘circuit’ defined here.
Each switch has for each of its ports, including the upstream port, a mutable array of circuit descriptors.
For some switches (perhaps most) and ports the size of this array is 0.
A circuit descriptor includes a local port number and an ‘outgoing circuit ID’.
All C packets include a ‘circuit ID’ in the header.
When a C packet arrives on a port its circuit ID is used to index into that port’s circuit descriptor table.
A new port number and circuit ID is found there.
Normally the packet is forwarded to the new port with the new circuit ID found in the table.
Variations of these ideas are found in Tymnet and also MLPS of Cisco Routers.
They are modified here to introduce only picoseconds of latency per switch.
This scheme begins to contemplate systems with more than one root complex as when two systems might be inter connected.
Now we can connect two downstream ports together and the graph is no longer acyclic; but in that case the software is a bit more complex.
Other details remain to be worked out in cyclic graph cases.