I am concerned here about digital data streams and how they flow thru hardware systems designed to carry them. Here are several sorts of hardware designed for streams:

A coaxial cable

moves analog data with constant delay. Coaxial cable plays only a submerged role in our ideas here.

Systolic array of registers

likewise provides constant delay, presuming that there is a constant clock.

FIFO buffers

provide variable latency and limited capacity.

DMA

interfaces between RAM and some sort of hardware stream. It may obey some sort of program in RAM to describe fancy patterns or RAM addresses to occupy successive elements of the stream.

Some streams include counterflow signals to limit incoming data. We call this ‘backpressure’ here; elsewhere it is called ‘flow control’.